Sanjana Singh

Research Scholar
Department of Computer Science & Engineering
IIT Delhi

Sanjana Sanjana

Advisor: Subodh Sharma
Member: Vertecs Group
  • Verification
  • Model Checking
  • Weak memory models
  • Programming languages
Find Me: Verification Lab
3rd floor, Bharti Building (Block IIA)
IIT Delhi

About Me
I'm a research scholar in the Department of Computer Science & Engineering, IIT Delhi. I work in Program Analysis and Verification.
I joined here in July 2016. Prior to this I was working at Jaypee University of Information Technology, Solan H.P. as Assistant Professor in the Department of Computer Science & Engineering.
I completed my masters through an integrated B.Tech-M.Tech in Computer Science from Jaypee Institute of Information Technology, Noida, U.P.
Currently Working On
Fence-synthesis under C/C++11.
C/C++11 memory model offers a range of reodering options through memory orders and C/C++11 fences. We introduce a technique that stops the program outcomes buggy under C/C++11 using C/C++11 fences.

Coarser notion of event equivalence for efficient model checking
We define an equivalence on program events, coarser than Mazurkiewicz equivalence to reduce the number of sequences to be explored by a stateless model checker.

C/C++11 restriction to Multicopy-atomicity
A subset of C/C++11 outcomes cannot manifest on multicopy atomic architechtures. We propose a restriction of C/C++11 that only allows C/C++11 outcomes permissible on multicopy-atomic architectures.

Fence Synthesis for the C11 Memory Model ATVA 2022
Sanjana Singh, Divyanjali Sharma, Ishita Jaju, Subodh Sharma
PDF Presentation Video Extended version

Dynamic Verification of C11 Concurrency over Multi Copy Atomics TASE 2021
Sanjana Singh, Divyanjali Sharma, Subodh Sharma
PDF Presentation Extended version

Member of Vertecs Research Group
VERification, TEsting, Concurrency, Security / Semantics (VERTECS2) is a research group in the Department of Computer Science and Engineering at IIT Delhi. We have members working in the areas of formal verification, concurrency, programming languages and security. The group wepage can be found here.
The webpage for the group has been designed by me.
Workshops, Programs & Visits
The Third Indian SAT+SMT School
06-08 December 2018
IIIT Hyderabad
The theme of the school was encodings in the solvers.

The Second Indian SAT+SMT School
06-08 December 2017
The theme of the school was quantifiers in solvers with tutorials on Quantified Boolean Formulas, Quantifiers in SMT solvers and Quantified invariants in verification tools.
I was member of the support organizers for the school and had created the official school webpage.

Winter School in Software Engineering (WSSE)
11-16 December 2017
The school included talks, tutorials and hands-on sessions focused program analysis and verification.

Japan-Asia Youth Exchange Program in Science (SAKURA)
25 June - 15 July 2017
University of Tokyo
SAKURA is a program for enhancing exchanges between Asia and Japan aiming at future close collaboration of industry-academia-government by facilitating short-term visits to Japan. You can read about my experience.

The First Indian SAT+SMT School
04-10 December 2016
The workshop included a basic course on logic, tutorials on solvers by eminent scientists and developers from around the world, and latest research and applications centered around these solvers.
M.Tech. Dissertation
Bug Localization for Exception Handling and Multithreading
Created a prototype tool for a bug localization technique that is based on the hypothesis that a mutant of the source code could be a better approximation of the intended code. The work involved proposal of mutation operators to create mutants to detect buggy lines of code. And testing of proposed mutants for usefulness towards the hypothesis.

B.Tech. Project
Mining mailing list for extracting useful information
Created a query response system that mines developer mailing lists for extracting useful information and possible response to the query and finally producing the best fit match for a user’s query. Used concepts like caching (of frequent responses), stopword elimination and stemming (for refining query), topic modeling (to classify mails in mailer list), sentiment analysis (to marks mails as positive or negative) and ranking mechanism (for ranking the responses).
Courses enrolled at IIT, Delhi
COL765 Introduction to Logic and Functional Programming
COL730 Parallel Programming
COL729 Compiler Optimizations (Sit through)
COL633 Resource Management in Computer Science
COL750 Foundations of Automatic Verification
COL869 Spl. Topics in Concurrency (focus: Concurrent Processes and Bisimulation)
COL871 Spl. Topics in Programming Languages and Compilers (focus: Anstract Interpretation)
COV882 Spl. Module in Software Systems
COL869 Spl. Topics in Concurrency (focus: Petri-nets) (Sit through)
COL869 Spl. Topics in Programming Languages and Compilers (focus: Program Synthesis) (Sit through)

Teaching Assistantship at IIT, Delhi
COL106 Data Structures​ (Jun-Dec '19)
COL380 Introduction to Parallel and Distributed Programming​ (Jan-May '19)
COL100 Introduction to Computer Science (Jun-Dec '18)
COV889 Special Module in Concurrency (Jan-May '18)
COL380 Introduction to Parallel and Distributed Programming​ (Jan-May '18)
COL765 Introduction to Logic and Functional Programming​ (Jul-Dec '17)
COL380 Introduction to Parallel and Distributed Programming​ (Jan-May '17)
COL729 Compiler Optimizations (Jul-Dec '16)

©2022 Sanjana Singh