Post-silicon Validation

Successful completion of post-silicon validation gives the chip manufacturer, sufficient confidence to release the chip into the market. However, post-silicon validation is time-consuming and labour-intensive. The limited bandwidth available for loading testcases into the chip, and collecting information on the internal state (through execution traces or otherwise) of the chip makes it time-consuming. The analysis of the gathered information to detect footprints of the bugs is labour-intensive due to the absence of a golden reference. We are working to tackle these issues by proposing several area-efficient design changes that embeds some intelligence into the on-chip Design-for-Debug (DfD) architecture to reduce the amount of data to be transferred off-chip. We are also working on techniques to assist the validation engineer to analyze the collected information. Thus far, we have been successful to reduce data to be transferred for both run-stop, and at-speed debug paradigms.

Optical Interconnect based Architectures

Futuristic on-chip interconnects like Optical Interconnects, and Transmission Lines offer high-speed broadcast and multicast communication to the participating threads. These technologies can be leveraged to provide high-speed synchronization constructs to multi-threaded applications. Several previous proposals have used such interconnects to minimize barrier release latencies. We extended these previous works to integrate them into actual systems by handling several other issues related to thread synchronization like presence of unknown participants, context-switches, per-barrier channel allocation, and thread migrations. We demonstrated that the distributed algorithm scales very well to large many-core systems.

Architectural Support for OS Jitter Mitigation

The operating system is a necessary evil for high-performance, soft real-time applications because while it performs various important house-keeping tasks, its activity induces unpredictable variations in the runtime of soft real-time tasks causing them to miss the deadlines. We proposed a scheme to measure, and characterize the source of jitter in commodity operating systems like Linux using custom counters called Jitter Units. The measurements made by Jitter Units were then used by DVFS controller to mitigate OS jitter encountered thus far.