Journals
  • Architectural Support for Handling Jitter in Shared Memory based Parallel Applications, by Sandeep Chandran, Prathmesh Kallurkar, Parul Gupta, Smruti R. Sarangi, IEEE Transactions on Parallel and Distributed Systems (TPDS). Volume 25, Issue 5, May 2014 (pdf)
  • Area-aware Cache Update Trackers for Post-silicon Validation by Sandeep Chandran, Smruti R. Sarangi, Preeti Panda, IEEE Transactions on VLSI Systems (TVLSI). (accepted)(pdf)

Conferences
  • Extending Trace History Through Tapered Summaries in Post-silicon Validation by Sandeep Chandran, Preeti Ranjan Panda, Smruti R. Sarangi, Deepak Chauhan, Sharad Kumar, Asia and South Pacific Design Automation Conference (ASPDAC'16), Macao SAR, China, 2016. (accepted)(pdf)
  • A Generic Implementation of Barriers using Optical Interconnects by Sandeep Chandran, Eldhose Peter, Preeti Ranjan Panda and Smruti R. Sarangi, International Conference on VLSI Design (VLSID'16), Kolkata, India, 2016. (accepted)(pdf)
  • Space Sensitive Cache Dumping for Post Silicon Validation by Sandeep Chandran, Smruti R. Sarangi, Preeti Ranjan Panda, Design Automation and Test in Europe (DATE'13), Grenoble, France, 2013. (pdf)