Sandeep Chandran is a Senior Design Engineer at AMD India Pvt. Ltd., Bangalore where he is part of the performance modeling team tasked with feature exploration for future AMD processors. He did his PhD from Indian Institute of Technology, Delhi under the guidance of Prof. Preeti Ranjan Panda and Prof. Smruti R. Sarangi in the area of Post-silicon validation. He has a Bachelors' degree from Visveswaraya Technological University in Computer Science & Engg. He has previously worked with Freescale Semiconductors Pvt. Ltd (currently NXP semiconductors Pvt. Ltd.), and Accenture in various roles.
His research interests include post-silicon validation methodologies, and modern accelerator-rich system architecture such as Processor-FPGA systems. He is also passionate about teaching (but has very little experience doing so).