MultiCore Systems: An Overview
Multicore processors are becoming mainstream architecture because of their superior performance and power characteristics. A multi-core processor is a processing system composed of two or more independent cores. It can be described as an integrated circuit to which two or more individual processors (also called cores) have been attached. The cores are typically integrated onto a single integrated circuit known as a chip multiprocessor or CMP. The recent emergence of multicore processor architectures represents a fundamental shift in design methodology. Before multicore, the general architectural trend was to increase the frequency. However energy consumption and heat dissipation of processors which are tied to frequency are approaching their physical limits. Further increasing the frequency requires deeper execution pipelines, thereby making the design and verification of already complex processors even more challenging. In addition the widening gap between processors and memory speeds has caused processors to
spend most of their time waiting for memory to provide data, making frequency increase ineffective. Before multicore chips, Symmetric Multiprocessor (SMP) and Non Uniform Memory Access (NUMA) systems were popular multiprocessor architectures. SMP consist of symmetrical or identical processors with shared memory architecture. The processors of SMP system share the common bus and the memory, however the processors have their own caches. The bus interconnect in SMP gets heavily overloaded as processor count increases, making SMPs non-scalable. Unlike SMPs the processors of NUMA have their own local memories and together they form a global shared memory. The time to access data from its own local memory is much less than the time it takes to access data from other processors local memory. This non-uniformity in accessing data from memory justifies it name of NUMA. The NUMA processors have point-to-point interconnection (e.g. mesh or fat tree) amongst them. Due to point-to- point interconnect these architectures are scalable to large number of processors. Figure 1 contrasts the difference between SMP and NUMA. In addition there exist several other types of multiprocessor systems which are generally a combination of SMPs and NUMAs. The roadblocks in the path of frequency increase in traditional computer systems have led to evolution of on-chip multicore systems. The traditional dual core and quad core systems have already replaced the high speed (frequency) uni-processor systems from the desktop / workstation / server machines. The multicore chips with 100 of cores are now available. The trend shows that in very near future 1000s of cores on a chip may be made available. Some of the example multicore systems are: Tilera 100 core processor and UltraSparc T2 architecture.
Research Focus: Runtime Support to MultiCore Systems
Multicore processors are becoming the mainstream architecture. Recently 100 core on-chip processor has been released and trend shows that in very near future 1000s of cores may be made available. But having large number of cores on-chip introduces several research challenges. In this research effort we are focusing on the problem of resource contention, non-uniform communication latency and scheduling of threads. We have observed that with the increase in number of cores, interconnects play an important role in overall system performance. In this research work, we intend to propose an interconnect aware framework to provide runtime support for multicore systems. The framework will have the capability to analyze the underlying architecture from interconnects perspective and will map the multithreaded computation at runtime with an aim to achieve overall performance gain.