Teaching

Current Semester (Semester II 2016-17)

COL 812 - System Level Design and Modelling (High-level Design and Modelling) Course Outline
Classroom Location: SIT 006
Class Schedule: Tuesday/Friday 8:15 to 9:45 AM

Previous Semesters

  • CSL 812 - System Level Design and Modelling (High-level Design and Modelling)
  • CSL 728 - Compiler Design
  • CSL 719/CS 411 - Synthesis of Digital Systems
  • CSP 745 - Digital Systems Design Laboratory
  • CSN 110 - Introduction to Computer Science and Engineering (IIT Delhi and IIT Punjab)
  • CSL 101 - Introduction to Computers and Programming
  • COL 100 - Introduction to Computer Science
  • CS 491/CS 492 - B. Tech Project
Copyright (C) 2016 P. R. Panda
Original design by Dreamtemplatestudio