News Archive

2017

[Feb 2017] P. R. Panda delivered inaugural talk "Embedded Systems-on-Chip: Research at the Forefront of VLSI Systems" and seminars on Hardware Synthesis at Faculty Development Programme in MNIT Jaipur.
[Jan 2017] Research paper "Managing Trace Summaries to Minimize Stalls During Post-silicon Validation" by S. Chandran, P. R. Panda S. R. Sarangi, A. Bhattacharya, D. Chauhan, and S. Kumar, to appear in IEEE Transactions on VLSI Systems.

2016

[Nov 2016] Research paper "A Coordinated Multi-Agent Reinforcement Learning Approach to Multi-Level Cache Co-partitioning" by Rahul Jain, P. R. Panda, and S. Subramoney, accepted for presentation at DATE'17, Lausanne.
[Nov 2016] Research paper "Reusing Trace Buffers to Enhance Cache Performance" by Neetu Jindal, P. R. Panda, and S. R. Sarangi, accepted for presentation at DATE'17, Lausanne.
[Oct 2016] Prof. Sri Parameswaran from Univ. of New South Wales visits the dept. and delivers a seminar on "QUADSEAL: A Hardware Countermeasure against Side channel Attacks on AES".
[May 2016] Research paper "Partitioning and Data Mapping in Reconfigurable Cache and Scratch Pad Memory based Architectures" by P. Chakraborty, P. R. Panda, and S.Sen accepted for publication in ACM Transactions on Design Automation of Electronic Systems.
[Mar 2016] Research paper "Machine Learned Machines: Adaptive Co-optimization of Caches, Cores, and On-chip Network" by R. Jain, P. R. Panda, and S. Subramoney, receives Best Interactive Presentation nomination at DATE'16, Dresden.
[Jan 2016] Research paper "Extending Trace History Through Tapered Summaries in Post-silicon Validation" by S. Chandran, P. R. Panda, S. R. Sarangi, D. Chauhan, and S. Kumar, receives Best Paper nomination at ASPDAC'16, Macau.
[Jan 2016] Prof. Chita Das from Penn State Univ. visits the dept. and delivers a seminar on "Architecting Next-Generation Mobile Platforms".
[Jan 2016] P. R. Panda was a member of the panel discussing "The Changing Indian Landscape, and Implications to University-Industry Collaboration" at Semiconductor Research Consortium India Design Review 2016, Bangalore.
[Jan 2016] Sandeep presented the research paper "A Generic Implementation of Barriers using Optical Interconnects" by S. Chandran, E. Peter, P. R. Panda, S. R. Sarangi, at VLSI Design'16, Kolkata.
[Jan 2016] P. R. Panda is an Associate Editor of IEEE Embedded Systems Letters starting 2016.

2015

[Dec 2015] Research paper "Area-Aware Cache Update Trackers for Postsilicon Validation" by S. Chandran, S. R. Sarangi, and P. R. Panda, to appear in IEEE Transactions on VLSI Systems.
[Oct 2015] Research paper "Integrated Exploration Methodology for Data Interleaving and Data-to-Memory Mapping on SIMD Architectures" by I. Filippopoulos, N. Sharma, P. G. Kjeldsberg, F. Catthoor, P. R. Panda to appear in ACM Transactions on Embedded Computing Systems.
[Oct 2015] Namita Sharma and Prasenjit Chakraborty are conferred the PhD degree.
[Oct 2015] Namita Sharma presents the research paper "Energy Efficient FFT Implementation through Stage Skipping and Merging" by N. Sharma, P. R. Panda, and F. Catthoor in CODES+ISSS'15, Amsterdam.
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