PROGRESS  REPORT      I SEMESTER 2002-2003

NAME    & ENTRY No.      MANOJ   KUMAR   JAIN, 1999 RCS 002

C.G.P.A.                                8.0

We have evolved strategy for storage exploration which includes register file, register windows and cache organization. Complete methodology is submitted for consideration for publication in DAC 2003 [1]. Earlier in the semester, we have further validated our technique for Trimedia processor and our technique was presented in international conference on compilers, architecture and synthesis, CASES 2002 held at Grenoble, France in October [2]. Currently we are in the process of evaluating the usefulness of our strategy. We also plan to submit synopsis in a couple of weeks.

Total contributions made so far during my research period are [1-9].

References

  1. Manoj Kumar Jain, M. Balakrishnan and Anshul Kumar : ``Exploring Storage Organization in ASIP Synthesis", submitted for consideration in DAC 2003.
  2. Manoj Kumar Jain, M. Balakrishnan and Anshul Kumar : ``An Efficient Technique for Exploring Register File Size in ASIP Synthesis", Proceedings of the Fifth International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2002, 8-11 October, 2002, Grenoble, France, Pages : 252-261.
  3. Jain M.K. : `` Exploring Register File Size in ASIP Synthesis.'', Inter Research Institutes Students Seminars, IRISS 2002, March 28-29 2002, IISc. Bangalore.
  4. Wehmeyer L.; Jain M.K.; Steinke, S.; Marwedel P.; Balakrishnan, M. : ``Analysis of the Influence of Register File Size on Energy Consumption, Code Size and Execution Time.'', IEEE TCAD, vol. 20, no. 11, Nov. 2001, Pages : 1329-1337.
  5. Jain M.K.; Wehmeyer L.; Steinke, S.; Marwedel P.; Balakrishnan, M. : ``Evaluating Register File Size in ASIP Design.'', Proceedings of the Ninth International Symposium on Hardware/ Software Codesign, CODES 2001, 25-27 April, 2001, Copenhagen, Denmark, Pages: 109-114.
  6. Wehmeyer L.; Jain M.K.; Steinke, S.; Marwedel P.; Balakrishnan, M. : ``Using an Energy Aware Compiler Framework to Evaluate Changes in Register File Size towards ASIP-Design.'', Fifth International Workshop on Software and Compilers for Embedded Systems, SCOPES 2001, 20-22 March, 2001, St. Goar, Germany.
  7. Jain, M.K.; Balakrishnan, M.; Anshul Kumar : ``ASIP Design Methodologies : Survey and Issues.'', Proceedings of the Fourteenth International Conference on VLSI Design, 2001, 3-7 Jan. 2001, Pages: 76-81.
  8. Jain M.K.; Wehmeyer L.; Marwedel P.; Balakrishnan, M. : ``Register File Synthesis in ASIP Design.'', Technical Report #746 07.12.200, Lehrstuhl Informatik XII, University of Dortmund, Germany.
  9. Jain, M. K.; Balakrishnan, M.; Anshul Kumar : ``ASIP Design Methodologies : Survey and Issues.'', Technical Report TR #2000/23, Embedded System Project, Department of Computer Science and Engineering, Indian Institute of Technology, Delhi.

 
 
 
 

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site last updated on
Dec 27, 2002 by Manoj Kumar Jain