Register File Synthesis in ASIP Design
PPT Slide
Flow Diagram of ASIP Design Methodology
Approaches by Gupta et al and Ghazal et al
What is needed ?
Objectives
Experimental Setup
ARM7TDMI Processor
Workflow of encc Compiler
Power Model
Benchmark Programs
Results
Assumptions
Number of executed instructions
Number of Cycles
Ratio of spill instructions to total static code size
Average power consumption (off-chip memory)
Average power consumption (on-chip instr. off-chip data)
Energy Consumption (off-chip memory)
Energy Consumption (on-chip instr. Off-chip data)
Results for the program lattice_init
Result for the program me_ivlin
Maximum variation in results
Conclusion
Future work
References
Email: manoj@cse.iitd.ernet.in
Home Page: http://www.cse.iitd.ernet.in/~manoj
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