Any C code is first parsed by the compiler frontend which converts this into an intermediate format and performs classical machine independent optimizations. This is used by ELCOR which uses the machine description facility to perform machine dependent optimizations as well as convert this to the ELCOR IR. The ELCOR is taken by the simulator and converted to a low level C file. This file is compiled on the host machine and linked with the emulation library.

Code size minimization is an important problem with VLIW architectures. The effect of a particular encoding/decoding strategy on application performance is an imporant criterion for choosing any strategy. In an experimental framework like Trimaran it is possible to explore the effect of a number of encoding/decoding strategies on application performance as well as their memory characterstics. It is also possible to explore the effect of decoder placement before or after the cache.

Goals

The goal of this mini-project is to study the effect on application performance of a particular encoding/decoding scheme. This can be accomplished by modelling the particular decoding hardware as a pipeline stage and capturing its effect as latency. To study the effect of a particular caching strategy on the application performance, the functionality needs to be put into the simulator. It is possible to incorporate this in SMACHS.

Reports and Presentations

First version of presentation is available : [ppt]

Draft version of report would be available shortly : [ps]

Important Notes

• A lot of changes to the approach were made, these are detailed out in the presentation as well as report! A completly automated version of the toolset would be available shortly.
   
• Please check out the Embedded System Group website for details of our other activities with Trimaran.