Project Reports, 2000-2001

• Technical report on ASIPs : Register File Synthesis
  in ASIP Design [ps]
  - TR #2000/26
  - Manoj Kumar Jain
  
  
• Hardware Estimation and Validation for Embedded Systems [ps]
  - TR #2000/27
  - BTP first sem report [ps]
  - Amit Soni and Saurabh Goel
  
  
• Hardware Software Partitioning [ps]
  - TR #2000/28
  - BTP first sem report [ps]
  - Love Singhal
  
  
• Application Specific Instruction Processor Synthesis and Estimation [ps]
  - TR #2000/29
  - BTP first sem report [ps]
  - R. Ram Kumar and Vijay G. Prabakaran
  
  
• Kernel Synthesis
  - TR #2000/30
  - BTP first sem report [ps]
  - Puneet Zaroo and Abheek Anand
  
  
• Mapping of Vision Algorithms on Pentium and FPGA [ps]
  - TR #2000/31
  - BTP first sem report [ps]
  - Manish Verma and Pravin Bhandakkar
  
  
• Visualisation and Analysis of Embedded Systems
  Framework (doc)
  - TR #2000/32
  - Ashish Gupta and Manan Sanghi (BTech Miniproject report)
  
  
• Customised Kernel Synthesis [ps]
  - TR #2000/33
  - Vishal Grover and Anant Chaudhary (BTech Miniproject report)
  
  
• Case Study - JPEG Encoder and Decoder (doc)
  - TR #2000/34
  - Puneet Sharma and Angshuman Parashar (BTech Miniproject report)
  
  
• Software Estimation (Minor Project) [ps]
  - TR #2000/36
  - Ankur Agarwal and Anurag Goel
  
  
• Register Window Analysis in ASIPs (ps)
  - TR #2000/37
  - Vishal P. Bhatt
  
  
• A Fast FPGA Based Design for Motion Segementation for Hardware Software Implementation (ps)
  - TR #2000/38
  - Neeraj Asthana
  
  

Project Reports, 1999-2000

• Interface Synthesis - Issues and approaches
  (survey report) [ps]
  - TR #1999/10
  - Arvind Rajawat
  
  
• Specification of Architecture Template for
  Embedded System Design
  - TR #1999/11
  - Rama Sudhakar (MTP Thesis)
  
  
• Software Estimation
  - TR #1999/12
  - Gaurav Agarwal and Soumyadeb Mitra (BTech Miniproject report)
  
  
• SUIF to VHDL [ps]
  - TR #1999/13
  - Love Singhal and Pavan Verma (BTech Miniproject report)
  
  
• Retargettable Code Generation [ps]
  - TR #1999/14
  - Dinesh Rathi and Nitin Rajput (BTech Miniproject report)
  
  
• Co-Simulation of Embedded Systems [ps]
  - TR #1999/15
  - Manish Verma, Puneet Zaroo and Shirshanka Das
     (BTech Miniproject report)
  
  
• Visualisation and analysis of platforms
  - TR #1999/16
  - Ch. Sheshagiri (MTP Thesis)
  
  
• Specification, modeling and verification of real-
  time embedded systems using Esterel [ps]
  - TR #2000/19
  - K.C. Shashidhar (MTP Thesis)
  
  
• Hardware software partitioning using dynamic programming [ps]
  - TR #2000/20
  - Mukul Kumar and Surender Reddy (BTP Thesis)
  
  
• Hardware estimation [ps]
  - TR #2000/21
  - Kapil Verma and Mohit Mittal (BTP Thesis)
  
  
• Kernel synthesis [ps]
  - TR #2000/22
  - Vivek Haldar and Gokul Vardhan (BTP Thesis)
  
  
• Interface Estimation for Automated Synthesis
  of Embedded Systems[ps]
  - TR #2000/23
  - Anupam Rastogi (BTP Thesis)
  
  
• ASIP Design Methodologies: Survey and Issues[ps]
  - TR #2000/24
  - Manoj Kumar Jain
  
  

Project Reports, 1998-1999

• Specification and Verification of Embedded
  Systems  [ps]
  - TR #1999/2
  - Piyush Garg and Sachin Bansal (BTP Thesis)
  
  

• A Framework for Development of Embedded
  Systems [ps]
  - TR #1999/3
  - Sushant Jain and Vivek Sinha (BTP Thesis)
  
  

• Processor Evaluation  [ps]
  - TR #1999/4
  - T. Vinod Kumar Gupta and Purvesh Sharma (BTP Thesis)
  
  

• Partitioning and Synthesis Targetted towards
  FPGA based implementation  [ps]
  - TR #1999/5
  - Aviral Shrivastava and Mohit (BTP Thesis)
  
  

• SUIF to VHDL  [ps]
  - TR #1999/6
  - D.Dinakar Srinivasa Rao and Tarkeshwar Thakur
     (BTech Miniproject report)
  
  

• Specification  using Esterel [ps]
  - TR #1999/7
  - K.C. Shashidhar (MTech Miniproject report)