Matching functionally Equivalent AFU patterns in synthesis of VLIW ASIPs

Synthesis of application specific processors is required to meet low cost, high performance and time to market constraints. A typical approach starts with profiling the application to find frequently occuring patterns in the Dataflow graph. A library of Specialized functional units(patterns) are constructed for these computations. The Dataflow graph of the application is then matched with the patterns in the Library. A straightforward structural pattern matching algorithm might miss patterns since it wont be able to use associativity, existence of identity and similar algebraic properties. In this work we try to rectify this problem by bringing the patterns and subgraphs into a canonical form and then do the matching. The implementation will be using the Trimaran Compiler Infrastructure.

Project Homepage

People Associated
Faculty		Students
Prof Anshul Kumar		Kiran C

    Power Management for Server System

Power optimisation at the server and data centre level has received considerable research attention in recent years due to the significant energy cost of maintaining such large data centres.Typical chip-level power optimisation strategies, while still relevant, need to be significantly adapted, and the associated models have to be defined at higher levels of abstraction. Typically the power supply units have low efficiency at low or very high loads. Their optimal efficiency is for load range of around 40 90%. There is a possibility of exploiting the knowledge of the shape of efficiency curves to reduce the overall power consumption by ensuring that we arrange our load and resources so as to work in the more efficient range (shaded) of the power efficiency curves

Project Homepage

People Associated
Faculty		Students
Dr Preeti Ranjan Panda		Anubha Verma

    Reconfigurable FPGA Architecture

People Associated
Faculty		Students
Dr Kolin Paul		S Arun Nair

    The Smart Cane Project - Knee above Obstacle Detection and Warning System for the Visually Impaired

People Associated
Faculty		Students
Prof M Balakrishnan		Dheeraj Mehra
Dr. Kolin Paul		Rohan Paul
		Vaibhav

    FFT Accerlation Project

Project Homepage

People Associated
Faculty		Students
Prof M Balakrishnan		Rohit Prakash
Dr Kolin Paul		Anand Silodia

    Performance estimation of Hardware Software Partitioning on distributed multi-accerlated architectures

People Associated
Faculty		Students
Prof M Balakrishnan		Shikha Kapoor
Dr Kolin Paul